ILA Hardware Debug

What it does

This skill enables an agent to perform full-loop on-silicon debugging for FPGA designs. It manages the transition from simulation to hardware by inserting Integrated Logic Analyzers (ILA), coordinating the implementation and bitstream generation, and then interacting with real hardware via JTAG to capture live waveforms.

When to use it

Use this skill when a design works in simulation but fails on the board, or when observing real I/O timing, PLL locks, and external device interactions is critical. It is specifically triggered by requests to "debug on hardware," "insert ILA," or "capture waveform on the board."

What's included

• Instructions: Detailed three-phase methodology: Phase A (Insert/Rebuild), Phase B (Program), and Phase C (Arm/Capture/Read). It includes safety rails to ensure .ltx files match bitstreams and timing is not compromised.
• Decision Logic: A symptom-to-action table for diagnosing hardware connection issues, trigger failures, and timing regressions.

Compatible agents

Designed for agents integrated with the SynthPilot MCP server and Xilinx Vivado toolchain.