Agent Skills

Design for Test (DFT)

digital-chip-design-agents

Guides Design-for-Test workflows: scan architecture planning, scan insertion, ATPG pattern generation, MBIST/LBIST insertion, JTAG setup, and DFT sign-off for m

JTAG/SWD Hardware Debugging

babysitter

Provides deep integration with JTAG/SWD debug probes for hardware-level debugging, flash programming, and real-time firmware analysis.

ILA Hardware Debug

oh-my-fpga

On-silicon debug methodology for FPGAs. Inserts ILAs, programs boards, and captures real-time waveforms via JTAG.