Agent Skills

Design for Test (DFT)

digital-chip-design-agents

Guides Design-for-Test workflows: scan architecture planning, scan insertion, ATPG pattern generation, MBIST/LBIST insertion, JTAG setup, and DFT sign-off for m

Static Timing Analysis (STA)

digital-chip-design-agents

Automates multi-corner constraint validation, setup/hold analysis, and ECO guidance for digital chip design timing closure.